Construct an 8-input NAND gate using only two-input AND gates and two-input NAND gates. Draw the logic arrangement that uses the minimum number of logic gates.
Let A,B,C,D,E,F,G and H be the 8 inputs of 8-input NAND gate. And Y be the output.
Then
Y = (ABCDEFGH)'
Y= (KLMN)'
Where K= AB
L = CD
M= EF
N= GH
That implies,
Y= (PQ)'
Where P= KL
Q= MN
Y = (ABCDEFGH)'
Y= (KLMN)'
Where K= AB
L = CD
M= EF
N= GH
That implies,
Y= (PQ)'
Where P= KL
Q= MN